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I used the double dabble algorithm to convert a 14 bit binary number into BCD and then extracted the 4 digits.I tested the component in Active-HDL and it works good, but once loaded on my Basys2 FPGA board, it displays the wrong numbers.If you really intend to construct a system based on two shift registers (one binary, one bcd) that takes 14 clock periods to do the conversion, then you need to describe the hardware that way, and set up a state machine to control it.The binary to BCD conversion I used was inspired from this website, with the only difference that I generated a 16-bit BCD number.
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