I used the double dabble algorithm to convert a 14 bit binary number into BCD and then extracted the 4 digits.I tested the component in Active-HDL and it works good, but once loaded on my Basys2 FPGA board, it displays the wrong numbers.If you really intend to construct a system based on two shift registers (one binary, one bcd) that takes 14 clock periods to do the conversion, then you need to describe the hardware that way, and set up a state machine to control it.The binary to BCD conversion I used was inspired from this website, with the only difference that I generated a 16-bit BCD number.
Provide details and share your research But avoid Asking for help, clarification, or responding to other answers. Making statements based on opinion; back them up with references or personal experience. MathJax reference. To learn more, see our tips on writing great answers. Not the answer youre looking for Browse other questions tagged fpga vhdl or ask your own question. Press question mark to learn the rest of the keyboard shortcuts Log in sign up User account menu 1 Logic Algorithm example Double Dabble. View entire discussion ( 1 comments) More posts you may like See more posts like this in rElectricalEngineering rElectricalEngineering A place to ask questions, discuss topics and share projects related to Electrical Engineering. Members 265 Online Created Apr 5, 2011 Join help Reddit App Reddit coins Reddit premium Reddit gifts about careers press advertise blog Terms Content policy Privacy policy Mod policy Reddit Inc 2020. ![]()
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